AMD公布HD6900指令集架构【转自驱家】

amuly

AMD今天给技术骨灰和开发人员们奉上了一份大礼，首次公开发布了Cayman Radeon HD 6900图形核心的指令集架构(ISA)文档。
这份PDF文档长达492页，详尽解释了“北方群岛”家族Radeon HD 6900指令集架构的方方面面，包括编程管理与状态、控制流编程、ALC子句、纹理缓存子句、内存读取子句、数据共享操作、指令集、微代码格式等章节，还附录了一份完整的指令列表。
不过文档中并没有模式设定和其他与指令集架构无关的部分。
下载地址：
http://developer.amd.com/gpu/AMDAPPSDK/assets/AMD_HD_6900_Series_Instruction_Set_Architecture.pdf

小白询问从这个pdf能看出什么

Edison

Differences Between the Evergreen Family and HD 6900 Series of Devices
The following bullets provide a brief overview of the more important differences
between the Evergreen family and HD 6900 series of GPUs. Note that other
devices in the 6000 series use the Evergreen architecture.
• Removed the vertex cache (VC). All memory fetches now are serviced by
the texture cache (TC).
• Removed the end_of_program bit from all CF_ instruction formats. Added a
CF_INST_END to end the kernel.
• Added the option to deallocate LDS space early using CF_LDS_DEALLOC.
• Added the CLAUSE_GLOBAL register, which can hold temporary values during
ALU clauses.
• Modified how MOVA and setting the Idx0, Idx1 registers work.
• Added the ability for a wavefront to raise or lower its priority relative to other
wavefronts.