求达人解释，GDDR5

panjanstoneborg

http://www.tomshardware.com/reviews/radeon-hd-4870,1964-3.html
GDDR5
GDDR5 uses an 8-bit prefetch, like GDDR4, but ushers in more innovations. First of all, GDDR5 uses two clock frequencies ,CK and WCK, the latter being twice as fast as the former. Commands aretransferred in SDR at frequency CK; addresses are transferred in DDR atfrequency CK; and finally, data are transferred in DDR and at frequencyWCK. In the case of the Radeon HD 4870, which uses GDDR5 at 900MHz, commands are transferred at 900MHz SDR, addresses at 900MHz DDR and data at 1800MHz DDR.
This approach reduces problems related to signalquality during transmission of commands and addresses while enablingvery high frequencies for data transmission. Unfortunately, the higherfrequencies also mean higher error probability.So to ensure the validity of the data transmitted, GDDR5 implements anerror detection mechanism based on the one used by networks. If anerror is detected by the memory controller, the command that caused itcan be re-executed.



主要是第一段吧，讲解如何实现“QDR”{mellow:]
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附后文一段：
So, AMD and Nvidia have made very different choices in order to meet thebandwidth needs of their GPUs, and those choices are related to theirdivergent visions of graphics processors. Nvidia,faithful to its concept of enormous monolithic GPUs, could afford touse a 512-bit bus, thus avoiding the supply problems that generallyaccompany the use of a leading-edge memory technology. Conversely, fromthe inception of the RV770, AMD has concentrated its efforts on a GPU with a reduced die size for high-end cards. As the AMD engineers toldus, the first version of the RV770 was supposed to have no more than480 ALUs, but the GPU proved to be "pad limited" in that configuration.

Consequently, AMD was able to offer the GPU it just released, with 800 ALUs that are almost “free” in terms of die surface area.It’s a problem Nvidia will face in developing its GT200b using a finerprocess: how to keep a 512-bit bus on a smaller die without being padlimited. With the preceding generation, Nvidia was forced to abandonthe 384-bit bus when it moved from the G80 (0.08µ) to the G92 (0.065µ).So there’s a good chance that will also happen with the 512-bit bus.But this time, Nvidia may rely on GDDR5 to compensate for the loss ofbandwidth.

给进来喷的提供一些内容……{blush:]

[ 本帖最后由 panjanstoneborg 于 2008-8-25 23:13 编辑 ]

G81

NV的下一代单卡卡皇肯定是512bit GDDR5了B)

羊库库

看来GT200B的确实现了面积的大缩水
甚至为了节省die size连512bit的显存I/O都要砍掉
换成256bit的GDDR5来弥补带宽损失
啊
260+的X2版本是否有可能因此而实现呢?

akcadia

{biggrin:] {biggrin:] {biggrin:]
如果GT200舍得砍掉那512BIT
核心也就是400出头。
45NM也就是200多。

cjinglu

就算GT200 40NM 核心只有200多，那时候要面对的可是同样40NM，但是2000SP的RV870，160US对240SP有20%的性能差距，512bit DDR3 和256bit DDR5 就算平手好了，看不出NV那什么来面对400US的RV870