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想换个Opteron 1657 A# e4 R/ ]8 G3 P+ k9 z
自己用的板子是微星 K8N Neo4 Platinum白金板
2 t2 E T5 u; \9 S5 L$ N, V* e& }SOCKET 939 K8 的$ I8 {* o/ P' a7 A$ L8 @+ ?
到底算可以用不?$ Q: ?8 N8 ^/ ~) M0 l( B
去微星网站上看了下CPU支持列表如下:( Z x8 t+ c( X; X# W
9 O s" B$ M! B9 k& @5 ~5 u# U5 \' n
CPU FSB 倍頻 測試結果 . L1 _1 V) C+ d) N t) N( l
Athlon 64 (ClawHammer, 130nm, L2 Cache 512KB) ) ?, a+ r/ K9 ?/ a+ c3 B" O) I
Athlon 64 3500+ (CG version) 200 11 OK & u7 c8 J7 | n" V' c0 h! v3 ]7 ^* A
Athlon 64 (ClawHammer, 130nm, L2 Cache 1MB) * u" [2 ^9 R; O& I6 P0 Q# a
Athlon 64 4000+ (CG version) 200 12 OK
2 v/ R! x' l9 t6 H0 mAthlon 64 (Newcastle, 130nm, L2 Cache 512KB) + [1 [- [3 r# n& ]
Athlon 64 3000+ (CG version) 200 9 OK
. t" R: G z# e* qAthlon 64 3200+ (CG version) 200 10 OK
0 L q) ^( _* _Athlon 64 3400+ (CG version, Hypertransport) 200 11 OK
3 A( p a/ z" w7 S6 U/ k; wAthlon 64 3500+ (CG version) 200 11 OK
' W' u3 q) U5 A4 [% `# _Athlon 64 3800+ (CG version) 200 12 OK
0 i# }, a# T& Q# W: bAthlon 64 (Winchester, 90nm, L2 Cache 512KB)
( M) E% J, ]+ {3 ?, xAthlon 64 3000+ (D0 version) 200 9 OK
$ c6 |# y5 p, DAthlon 64 3200+ (D0 version) 200 10 OK
% d; q n( E: DAthlon 64 3500+ (D0 version) 200 11 OK
' X$ V$ U2 Q; s" V' H9 q9 l+ CAthlon 64 (Venice, 90nm, L2 Cache 512KB)
& V5 i* y6 I' h/ H# `, xAthlon 64 3000+ (E3 version) 200 9 OK - t% y- u4 t. [# _& y; `) @
Athlon 64 3200+ (E3 version) 200 10 OK 8 R+ t( P0 O7 R4 B; X
Athlon 64 3500+ (E3 version) 200 11 OK ) Y4 B: N4 l+ f6 O( j$ @
Athlon 64 3800+ (E3 version) 200 12 OK - Z X! ^0 I9 ]6 I
Athlon 64 (Venice, 90nm, L2 Cache 512KB)
! v) O4 T9 z3 Y1 F6 M( oAthlon 64 3000+ (E6 version) 200 9 OK
( P* V/ P( Z& g% K) h2 rAthlon 64 3200+ (E6 version) 200 10 OK * T& P4 k) I; b1 r; u4 k
Athlon 64 3400+ (E6 version) 200 11 OK
" {" e* v: e* S. |- `Athlon 64 3500+ (E6 version) 200 11 OK
8 M& S8 n: k Z1 A. NAthlon 64 3800+ (E6 version) 200 12 OK
8 b+ S7 _2 G4 B6 u2 @/ }3 W4 `$ j. F8 n( HAthlon 64 (San Diego, 90nm, L2 Cache 1MB) 2 |& A7 R9 d% K; l5 k
Athlon 64 3700+ (E4 version) 200 11 OK
* n" z1 A5 j$ Q; q# ^Athlon 64 4000+ (E4 version) 200 12 OK ! |8 j* I6 f1 ?& f- h& d
Athlon 64 FX (ClawHammer, 130nm, L2 Cache 1MB) ; G% E, A( z2 _! [
Athlon 64 FX53 (CG version) 200 12 OK
6 J; C+ L2 x- H! u# E& B6 x; BAthlon 64 FX55 (CG version) 200 13 OK
7 A* ?! h0 ]$ DAthlon 64 FX (San Diego, 90nm, L2 Cache 1MB)
" z3 k/ P! Q k% ] m6 q" TAthlon 64 FX-55 (E4 version) 200 13 OK & h8 O) u+ t8 ]3 `
Athlon 64 FX-57 (E4 version) 200 14 OK u7 ?2 l# R8 d! E' _( V
Athlon 64 X2 Dual-Core (Manchester, 90nm, L2 Cache 2 x 512KB) $ j) i$ v4 c3 j
Athlon 64 X2 Dual-Core 3800+ (E4 version) 200 10 OK 4 j( f/ V0 t* M B6 p- g
Athlon 64 X2 Dual-Core 4200+ (E4 version) 200 11 OK , j7 u0 s0 |8 Y( e" H! `: `, H: g
Athlon 64 X2 Dual-Core 4600+ (E4 version) 200 12 OK
( o% r) n5 M: J4 {% c" p9 r: dAthlon 64 X2 Dual-Core (Manchester, 90nm, L2 Cache 2 x 512KB) ; p! S- J1 h u( Z6 w: }8 o& s" X: h: }
Athlon 64 X2 Dual-Core 3800+ (E6 version) 200 10 OK
. I+ l5 ~& U- _$ t" e# W6 M2 eAthlon 64 X2 Dual-Core 4200+ (E6 version) 200 11 OK " N5 \" Q6 S! D: b3 @5 g9 O4 i
Athlon 64 X2 Dual-Core 4600+ (E6 version) 200 12 OK / Y: ~9 ~) D/ P) ^4 L' m7 S1 s
Athlon 64 X2 Dual-Core (Toledo, 90nm, L2 Cache 2 x 1MB) 5 L: {6 s( |7 Q
Athlon 64 X2 Dual-Core 4400+ (E6 version) 200 11 OK - m' O, U& I. [
Athlon 64 X2 Dual-Core 4800+ (E6 version) 200 12 OK |
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