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想换个Opteron 165
+ M6 U' g4 `& O自己用的板子是微星 K8N Neo4 Platinum白金板 0 P+ L/ N$ `# w; _# @
SOCKET 939 K8 的1 d/ u! x. @( H
到底算可以用不?
0 J8 V# [$ A/ ?3 @2 F去微星网站上看了下CPU支持列表如下:. V/ d3 @& \7 z2 c
! u9 A! }2 Y" W& ^8 ` X! H' x4 [% p; p& E- F
CPU FSB 倍頻 測試結果
6 j/ K& J3 l; s f. v/ iAthlon 64 (ClawHammer, 130nm, L2 Cache 512KB)
* |- N& o0 n* k# q3 xAthlon 64 3500+ (CG version) 200 11 OK # Y+ ]2 {0 p, m4 x
Athlon 64 (ClawHammer, 130nm, L2 Cache 1MB) , ~+ p2 v; S1 z5 ?* k! \3 O6 R! p
Athlon 64 4000+ (CG version) 200 12 OK 8 j6 F% b5 P% z3 I, Q
Athlon 64 (Newcastle, 130nm, L2 Cache 512KB)
+ U7 [* m3 x; JAthlon 64 3000+ (CG version) 200 9 OK
4 Y; D; B* n& e) ]Athlon 64 3200+ (CG version) 200 10 OK , M6 c5 A8 E! H- U: K5 C7 @5 q
Athlon 64 3400+ (CG version, Hypertransport) 200 11 OK 1 z/ Q# a k: u0 P1 |% U4 \3 |
Athlon 64 3500+ (CG version) 200 11 OK 6 w r: \: y2 S5 `
Athlon 64 3800+ (CG version) 200 12 OK
/ A3 P* a' K" Q6 f1 NAthlon 64 (Winchester, 90nm, L2 Cache 512KB) , v0 n, M( i7 K. x( D* h, A" D
Athlon 64 3000+ (D0 version) 200 9 OK
, c6 b0 f2 C4 t. k6 M8 u# R/ O9 jAthlon 64 3200+ (D0 version) 200 10 OK
! U H7 @. Y6 Z; u- M9 ?Athlon 64 3500+ (D0 version) 200 11 OK 2 `* K5 ] ]* B3 b5 z3 X1 z3 x
Athlon 64 (Venice, 90nm, L2 Cache 512KB) 3 S# d& Y7 r* I% q, y, K$ O
Athlon 64 3000+ (E3 version) 200 9 OK
3 `: A+ y: X. e" h: u" e U pAthlon 64 3200+ (E3 version) 200 10 OK
% C% c) ~6 U7 ?5 C2 X" h# uAthlon 64 3500+ (E3 version) 200 11 OK 1 u" u2 l# M6 J! q
Athlon 64 3800+ (E3 version) 200 12 OK
9 r% w4 v, m( u2 c9 G; W* lAthlon 64 (Venice, 90nm, L2 Cache 512KB)
+ a* @# G, T& ]Athlon 64 3000+ (E6 version) 200 9 OK
) F8 ] ?. {+ X6 e xAthlon 64 3200+ (E6 version) 200 10 OK , g( i* o2 @6 s7 _( m0 I; _
Athlon 64 3400+ (E6 version) 200 11 OK : i0 |4 P+ H' ^) n6 x
Athlon 64 3500+ (E6 version) 200 11 OK ; W1 g+ P8 ]: }/ J7 w/ B7 A
Athlon 64 3800+ (E6 version) 200 12 OK
: n5 g7 d0 Q2 K( O1 w+ DAthlon 64 (San Diego, 90nm, L2 Cache 1MB) # p$ L3 Q) T' D) |/ ~" i% F8 b
Athlon 64 3700+ (E4 version) 200 11 OK
2 H/ E1 X" p' Z! ]" l5 Z9 n+ o2 JAthlon 64 4000+ (E4 version) 200 12 OK 4 l2 |* W, p0 t% z" Z
Athlon 64 FX (ClawHammer, 130nm, L2 Cache 1MB) 2 K8 f0 s; l/ _- m& |& R7 P1 ^
Athlon 64 FX53 (CG version) 200 12 OK 2 ?6 O: @$ o/ m( l% c% e/ y+ V1 w
Athlon 64 FX55 (CG version) 200 13 OK
+ L6 W5 q/ i! I1 @7 [Athlon 64 FX (San Diego, 90nm, L2 Cache 1MB) 9 v8 @% K7 b; k
Athlon 64 FX-55 (E4 version) 200 13 OK
# L' c* J! A/ B9 {3 DAthlon 64 FX-57 (E4 version) 200 14 OK
5 w. b2 x* C0 m" CAthlon 64 X2 Dual-Core (Manchester, 90nm, L2 Cache 2 x 512KB) - Q: K$ @; o- h1 R# \! k
Athlon 64 X2 Dual-Core 3800+ (E4 version) 200 10 OK
& D: B3 U2 ^( h" ]' q, nAthlon 64 X2 Dual-Core 4200+ (E4 version) 200 11 OK : i: _. X) ]5 S7 i
Athlon 64 X2 Dual-Core 4600+ (E4 version) 200 12 OK 1 r8 \7 P* k9 Y) ^3 u; c
Athlon 64 X2 Dual-Core (Manchester, 90nm, L2 Cache 2 x 512KB) ( u- ^$ D2 x; |0 H* d# j- V6 q9 n9 {1 {
Athlon 64 X2 Dual-Core 3800+ (E6 version) 200 10 OK
' I# R7 U6 ^6 q# b/ G0 _Athlon 64 X2 Dual-Core 4200+ (E6 version) 200 11 OK
' k8 G1 W1 a) _1 E7 bAthlon 64 X2 Dual-Core 4600+ (E6 version) 200 12 OK , m2 n8 D9 V+ C9 m
Athlon 64 X2 Dual-Core (Toledo, 90nm, L2 Cache 2 x 1MB)
% a3 b ~& a& p: T& OAthlon 64 X2 Dual-Core 4400+ (E6 version) 200 11 OK $ |" \4 K. Q g1 e# U- P% n5 I
Athlon 64 X2 Dual-Core 4800+ (E6 version) 200 12 OK |
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