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1.配套芯片组为32NM The successful candidate will be responsible for managing the Lynx Point silicon design activities to ensure the on time delivery and quality of the Lynx Point chipset. Lynx Point is the tock chipset on P1269.8 that will be used with the Haswell CPU. In this capacity the design manager is responsible for all aspects of the silicon development lifecycle to A0 T/I and PRQ. The successful candidate will matrix the Lynx Point development that will be spread across Folsom, Penang and Hudson. The design manager is also responsible to manage IP being supplied to Lynx Point from teams outside CCG. The design manager responsibilities shall include: Schedule development, tracking and proactive risk identification, Risk Management, Scope & requirements management, managing all aspects of the silicon design activities to meet quality and schedule goals. 2.频率超过4G |
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