5.2GHz IBM 公布全球最快处理器 z196 细节

Edison

IBM revealed more details of its 5.2-GHz chip on Tuesday, the fastest microprocessor ever announced. Don't bet that you'll ever be able to buy it, though.

At the Hot Chips 2010 conference in Palo Alto, IBM executives described the z196, which will power its Z-series of mainframes, which can cost hundreds of thousands of dollars, if not over a million. IBM will ship the chip in September, said Brian Curran, an IBM distinguished engineer. The mainframe itself was announced in July.

IBM also previously claimed the title of fastest microprocessor with the POWER6 chip, which ran at speeds of up to 4.6 to 4.7 GHz, and its own z10, a 2008 chip which ran at speeds of up to 4.4 GHz.

IBM defines the z196 as one of the few remaining CISC chips, which allows for bulky, large programs that can require much more memory to execute in than RISC chips, including the PowerPC and ARM embeddded processors, among others.

The z196 contains 1.4 billion transistors on a chip measuring 512 square millimeters fabricated on 45-nm PD SOI technology. It contains a 64KB L1 instruction cache, a 128KB L1 data cache, a 1.5MB private L2 cache per core, plus a pair of co-processors used for cryptographic operations.

In a four-node system, 19.5 MB of SRAM are used for L1 private cache, 144MB for L2 private cache, 576MB of eDRAM for L3 cache, and a whopping 768MB of eDRAM for a level-four cache. All this is used to ensure that the processor finds and executes its instructions before searching for them in main memory, a task which can force the system to essentially wait for the data to be found—dramatically slowing a system that is designed to be as fast as possible.

The chip uses 1,079 different instructions, Curran said. Of these, 75 can be used by millicode only, with 219 executable by millicode; an additional 24 instructions are conditionally executed by millicode. (Millicode is an internal term used at IBM for instructions internally executed by the processor, slightly bulkier than the "microcode" used by other chips.) The chip can use 211 medium instructions cracked into two or more instructions at issue, with 269 dual issued. The remaining 340 instructions are RISC-like, Curran said.

CC9K

In a four-node system, 19.5 MB of SRAM are used for L1 private cache, 144MB for L2 private cache, 576MB of eDRAM for L3 cache, and a whopping 768MB of eDRAM for a level-four cache.

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4479237

比最快的INTEL快多少呢

PRAM

这玩意成本是天文数字

bessel

这是24个cpu，总计96个核心的总和。
不要那么吃惊好不好。

In a four-node system, 19.5 MB of SRAM are used for L1 private cache, 144MB for L2 private cache, 57 ...
CC9K 发表于 2010-8-25 12:14

leeyuanxun

蓝色巨人也爆发下

克之

内容高成本的东西

elisha

核融合炉

二代战神

这玩意是大型机    用的还是power7

话说昨天IBM雷迪森请客吃饭   中间也宣传了一下这个东西

sfeng0

蓝巨人威武

lvywb

蓝色巨人v5

sccopy

蓝巨人威武

richleo

回复 2# CC9K


    哥只是个传说~

kakaku.bj.cn

全鸟语看MA0 ....exe

pharaway

xbox720会用上吗？？？

lzc_dl

随便上网翻译一下
IBM透露更多详情,其5.2-GHz芯片在星期二,最快的微处理器曾宣布。不要选择,这样你就能买它。
　　
　　在炎热的芯片在2010年会议帕洛阿尔托,IBM公司高管z196描述,它的力量,它可以Z-series大型机成千上万美元的费用,如果不超过100万。国际商用机器公司(IBM)将在9月的芯片(音译)说,布莱恩力压群芳,IBM杰出的工程师。主机本身是在7月宣布的。
　　
　　IBM也曾宣称的标题和POWER6最快的微处理器晶片,它跑的速度来4.7千兆赫,4.6%,自身z10 2008芯片,跑的速度4.4千兆赫。
　　
　　国际商用机器公司(IBM)定义了z196为一体的为数不多的CISC芯片,使笨重、大型项目也需要更多的内存来执行,包括比RISC芯片PowerPC和手臂的embeddded处理器,等等。
　　
　　这个z196含1.4亿晶体管在一块芯片上测量512平方毫米的45-nm PD SOI技术。它包含了64KB L1指令缓存一个128KB L1空间隐藏所,1.5MB私人L2缓存的核心,加上每一双co-processors用于加密操作。
　　
　　在four-node 19.5元兆内存系统,用于L1私人缓存,144MB为L2私人缓存,576MB为L3 eDRAM的缓存,多达768MB eDRAM的一个level-four缓存。所有这一切都是用来确保处理器和执行它的指示之前,寻找他们的任务主要存储器,可以使系统基本上等数据,found-dramatically减慢系统被设计成尽可能快的。
　　
　　1,079片使用不同的指示,力压群芳说。这些,都可以用millicode 75只,以millicode 219执行的指令,额外的24岁millicode被证实。(Millicode是一种内在的术语用于IBM执行指令的处理器内部,稍微粗大的“如微码”于其它芯片。)芯片可以使用211介质说明裂成两种或两种以上说明问题,与269双重发布。剩下的340指令是RISC-like,力压群芳说。

最弱的ID

这个不是堆料王么？

IBM以前被intel甩开了

aitor2005

好高的主频啊  呵呵