拉拉逼(Larrabee)又原地满血复活了,NV的通用计算又要被抢了

gtx5

基于22nm三栅极工艺技术，由32个X86核心组成运行在1.3G左右，8卡并联理论峰值有7TF双浮点多。


At the International Supercomputing Conference (ISC) 2011 in Hamburg, Germany, Intel unveiled additional details about their Many Integrated Core (MIC) architecture. This technology developed out of the Larrabee GPU project, which was initially meant to be a high-performance x86-based discrete graphics processor. As we all know, Larrabee didn't quite deliver and Intel moved the project into a different direction.

Intel Knights Corner packs around 50 core chip at 22nm, targeting HPC segment
Intel Knights Corner packs around 50 core chip at 22nm, targeting HPC segment

Starting 2010 Intel provided sample boards codenamed Knights Ferry to developers interested in the technology. These weren't offered on the free market, but rather you had to tell Intel that you are interested in using this technology and you better had some good reason doing so. With the upcoming MIC product codenamed Knights Corner this should change.
Intel just announced that the first shipping products will be manufactured at the 22nm node featuring 3D transistors and feature over 50 tiny x86 cores. Intel specifically touts the advantage of using known programming models to program the highly parallel chip. It is possible to have code running both on regular CPU cores and the x86 cores of the accelerator card. A definitive shipping date has not been announced. But if the progress on the 22nm process is any indication, the products can be ready as early as in the first quarter of 2012, but I wouldn't bet on that.

Programming Model for Larrabee Many Core Architecture
Programming Model for Intel's Larrabee Many Core Architecture touts simplicity and easy exchange between processing on main CPU or offloading it to MIC products such as Auburn Isle/Knights Ferry

Knights Ferry Development Board: This is still Larrabee PCB, as Intel removed all display connections
Knights Ferry Development Board: This is still Larrabee PCB, but Intel removed all the display connections and modified cooling

Technical specifications of Knights Corner were unavailable at press time. Knights Ferry evaluation boards feature C0 or D0 stepping Auburn Isle chip, clocked at 1.2GHz and feature 32 cores, each being capable of processing four threads at a time. Auburn Isle also integrated 8MB of coherent cache, one of original reasons why the graphics part of Larrabee architecture did not perform as planned. Knights Ferry board also packs 2GB of GDDR5 memory clocked at 750MHz QDR (3 GT/s). In order to cool down the board, Intel opted for an open end design and a dual-slot cooler.

SGI's view for achieving ExaFLOP perfprmance by 2018
SGI's view for achieving ExaFLOP perfprmance by 2018

Intel has some bold plans with this technology. By 2018 they want to enable ExaScale computing using their MIC architecture. Just to give you a comparison, 1 EFLOP equals 1000 PFLOP. The fastest supercomputer, whi**as also been announced at the ISC 2011 in Hamburg is now the K Computer located at the RIKEN Advanced Institute of Computational Science in Japan delivering 8.16 PFLOPs of Linpack performance.

Intel Knights Ferry Demonstrations at ISC 2011
Intel Knights Ferry Demonstrations at ISC 2011: eight Auburn Isle chips at 1.2GHz yield 7.4TFLOPS of peak computing performance

On ISC 2011, Intel is demonstrating the Knights Ferry boards in single and eight board configuration, demonstrating how 256 MIC cores reach 7.4TFLOPS of peak performance. While this is not as impressive as it seems at first - NVIDIA is demonstrating eight Tesla M2090 boards reaching 10.48 TFLOPS (4096 cores at 1.3GHz) - bear in mind that a mass production Knights Corner board will feature a 22nm silicon with 40% more cores than Auburn Isle, as well as significantly higher clock.

All in all, HPC space in 2012 will really heat up with the arrival of MIC silicon from the market leader.

gtx5

MIC架构在编程方面与x86很相似

LRZ支持

SGI支持

MIC开发展示

MIC架构合作伙伴研究方向展示

MIC合作伙伴

gtx5

全球超级计算机500强最新名单发布之际，Intel也在国际超级计算大会(ISC)上再次表达了进军百亿亿次计算(ExaFLOP/s或者说EFlops)的决心，争取在2020年之前利用自己的众核心(MIC)架构达成这一目标。
随着摩尔定律的进化，超级计算机的性能也正在迅速提升，但因此带来的功耗问题也越来越显著，比如一度全球最快的我国天河一号A，要想达到百亿亿次计算级别，必须付出16亿瓦的耗电量，相当于200万个家庭的用电量。Intel则宣称，他们的MIC架构能够在提供百倍于当今性能的同时，功耗仅仅增加一倍。
Intel MIC是在已有的Xeon处理器产品基础上发展而来、专为超高性能计算而生的新架构，首款产品代号“Knights Corner”，计划采用22nm 3-D Tri-Gate三栅极晶体管工艺制造，核心数量超过50个。
Intel目前已经推出了专为MIC架构设计的软件开发平台“Knights Ferry”，核心协处理器代号“Auburn Isle”，拥有最多32个核心、128个线程和完全一致性缓存，支持512-bit SIMD，搭配最多2GB GDDR5显存。
ISC大会上，Intel与多家合作伙伴展示了Knights Ferry平台的早期成果，包括德国尤利希研究中心、德国莱布尼茨超级计算中心(LRZ)、欧洲核子研究中心(CERN)、韩国科学与技术信息研究院(KISTI)，演示了Intel MIC架构如何同时发挥在性能和软件编程两方面的优势。
Intel还同时联手SGI、戴尔、惠普、IBM、Colfax、超微等展示了基于Knights Corner的服务器和工作站。
Intel预计，2013年的时候全球最快的100台超级计算机将会使用100万颗处理器，2015年再翻一番，2020年左右达到800万颗；排名第一的超级计算机的性能有望在2015年达到100PFlops(十亿亿次浮点计算)，2018年最终突破1EFlops大关，2020年再翻两番达到4EFlops，也就是每秒钟能够完成四百亿亿次浮点计算。
Intel甚至预言，超级计算机的性能将在2030年左右再提高一个数量级，达到1ZFlops，也就是每秒钟十万亿亿次浮点计算。
第37届全球超级计算机500强名单中，Intel处理器占据其中的387台，普及率77％，同时Intel处理器在今年新上榜的超级计算机中占据88％，而且其中一半多都使用了最新的32nm Xeon 5600系列。这种新处理器在整个排行榜上的比例已经超过35％，是去年的三倍。

elisha

其实十年前top500还是risc的天下，intel一声不吭就把HPC市场通吃了，跟某整天放炮的公司成为鲜明对比

xboxzx

elisha 发表于 2011-6-21 23:39
其实十年前top500还是risc的天下，intel一声不吭就把HPC市场通吃了，跟某整天放炮的公司成为鲜明对比

天河一号等又哭了
还有转帖帝辛苦了

泯灭

之前不是发过了？

goldman948

原地满血复活,却不料被nv守尸

xiaxin222a

gszgsz 发表于 2011-6-22 09:03
算了吧...天河已经被小日本爆了chrysanthemum了

我对京的成本很感兴趣。

w66guo

xiaxin222a 发表于 2011-6-22 09:22
我对京的成本很感兴趣。

人家说性能的时候，你来比成本；人说家名次的时候，你来比体制？

xboxzx

xiaxin222a 发表于 2011-6-22 09:22
我对京的成本很感兴趣。

京的意义不在于成本，而在于使得日本可以独立制作超算，成本反而是次要因素

8l那句是亮点


性能这对于NV和富士通都不能说是问题，像NV的麦克斯韦过几年也要出来，富士通这个就不说了

loverlong

{titter:]NV被抢了市场，AMD该洗洗睡了。转帖帝新闻都不好好看。

asdfjkl

w66guo 发表于 2011-6-22 09:29
人家说性能的时候，你来比成本；人说家名次的时候，你来比体制？

你这是搞笑，限制成本可能有好的性能吗？

你这真是：又要马儿跑，又要马儿不吃草！

asdfjkl

gtx5 发表于 2011-6-21 22:29
基于22nm三栅极工艺技术，由32个X86核心组成运行在1.3G左右，8卡并联理论峰值有7TF双浮点多。

基于22nm三栅极工艺技术，由32个X86核心组成运行在1.3G左右，8卡并联理论峰值有7TF双浮点多。

恭喜! 恭喜！
2012年Inte在22nm工艺的帮助下，终于赶上了NV在2010年使用40nm工艺达到的成绩，
能赶上GF100真是难为Intel了。

asdf666

个人觉得英特尔这个加速器推广会比N或A的好很多
毕竟是X86的，编程可行性高

为什么当年的A的加速发展停滞不前？N的加速局限性那么高？
无非就是编程难度

至于性能   不做评价   没看到实际产品，但相信不会差

西北狼人

Intel又回来了:loveliness:

the_god_of_pig

asdfjkl 发表于 2011-6-22 13:04
基于22nm三栅极工艺技术，由32个X86核心组成运行在1.3G左右，8卡并联理论峰值有7TF双浮点多。

恭喜! ...

人那是cpu好不好

鱼儿水中游

转帖帝为了表示自己不是驱家的，特地转了一篇外文的。