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PCI Express 4.0 将在 2015 年推出,每条 lane 速度将达到 16GT/s

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1#
发表于 2011-6-27 19:31 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
PCI Express 4.0 to offer double the performance
By Hilbert Hagedoorn, June 24, 2011 - 8:23 PM via eetimes




The PCI Special Interest Group (PC-SIG) announced there will be one more PCI Express standard before having to make the switch from copper to optical interconnects. The PCI Express 4.0 standard is expected to arrive around 2015 and promises 16 gigatransfers per second, double as much as the PCI Express 3.0 standard.

"The initial report we got yesterday is a PCI Express 4.0 is feasible--we have to work out the details, but it is feasible," said Al Yanes, president of the PCI SIG, speaking in a press briefing at the group's annual developers conference.

A exploratory group including members from AMD, Hewlett-Packard, IBM and Intel are conducting simulations using chip, channel, packet and socket data. They have determined throughput of at least 16 GT/s is possible and are expected to deliver a final report before the end of the year.

"We think we can eke out one more turn of the crank out of copper, so we are not looking at optics yet," said Ramin Neshanti, chairman of the PCI SIG's serial communications working chair.

It took the PCI SIG about four years to hammer out its 8 GT/s PCIe Gen 3 spe** required new signal encoding and equalization schemes. The Gen 4 spec should take a similar period, but this time the focus will be less on silicon and more on the board-level channels through which signals pass, Neshanti said.
Specifically, Gen 4 will probably be limited to distances of about eight to 12 inches compared to 20 inches for Gen 3. Engineers wanting longer reaches will need to use repeaters, a potential growth area for PCIe silicon.

The Gen 4 boards may need to use new materials, via designs and backwards-compatible connectors designed for improved signal integrity to reduce impedance discontinuities. "We think we have achieved about as much as we can scaling silicon," said Neshanti who also serves as an I/O standards manager at Intel.

That's a big shift for the PCIe community whi**as not previously required major changes of board makers. Typically the PCI SIG has thrown its hardest problems to chip makers such as AMD, Intel, NEC and others to ease problems for its less technically sophisticated supply chain among high volume PC board and system makers.

Nevertheless, some significant silicon shifts are ahead. Transceivers for Gen 3 were the first to use techniques to massage signals, adopting single-tap decision feedback equalization (DFE).

http://www.guru3d.com/news/pci-e ... le-the-performance/
G70 该用户已被删除
2#
发表于 2011-6-27 19:51 | 只看该作者
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3#
发表于 2011-6-27 19:56 | 只看该作者
还很遥远。。。看我能度过2012不
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4#
发表于 2011-6-28 19:32 | 只看该作者
Maxwell都赶不上PCIE4.0啊:funk:
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5#
发表于 2011-6-29 20:45 | 只看该作者
关键是供电能否提升到600W
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6#
发表于 2011-6-30 14:00 | 只看该作者
面向大众的家用PC,仅显卡供电就需要600W是一种什么样的精神
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potomac 该用户已被删除
7#
发表于 2011-6-30 16:03 | 只看该作者
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8#
发表于 2011-7-1 16:44 | 只看该作者
samsunggram 发表于 2011-6-30 14:00
面向大众的家用PC,仅显卡供电就需要600W是一种什么样的精神

低端应用不断被其他设备取代,pc目前的活路也就是不断往怪兽效能功耗
前进而已.
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9#
发表于 2011-8-5 23:33 | 只看该作者
pcie4.0似乎对HPC更有用些
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10#
发表于 2011-8-6 01:03 | 只看该作者
就凭现在的显卡连2.0的带宽都用不上吧?
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11#
发表于 2011-8-6 01:30 | 只看该作者
Gen3的布线要求和功耗都高了不少,还来个Gen4~~还是LightPeak靠谱

现在的卡,工艺和规模是越来越高了,电压倒是降不了多少,功耗越来越高
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