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http://www.dailytech.com/article.aspx?newsid=5869
The lithography process for Penryn, dubbed P1266, is not just a shrink from 65nm to 45nm. Perhaps the most significant advance on P1266 is the use of high-k dielectrics and metal gate transistors. In a nutshell, the polysilicon gate used on transistors today is replaced with a metal layer and the silicon dioxide dielectric that sits between the substrate and the transistor is replaced by a high-k dielectric.
Intel's push for high-k dielectrics and metal gate transistors may be more significant than the node shrink. Intel's guidance documentation claims with the new high-k dielectric, metal gate transistors offer a 20% increase in current, which can translate to a 20% increase in performance. When the new transistor technologies run at the same current and frequencies as Core 2 Duo processors today, translates to a 5-fold reduction in source-drain leakage and a 10-fold reduction in dielectric leakage.
"The implementation of high-k and metal gate materials marks the biggest change in transistor technology since the introduction of polysilicongate MOS transistors in the late 1960s" claims Gordon Moore, Intel co-founder attributed with coining "Moore's Law."
Intel would not reveal the materials used in its metal gate technology, though Smith announced that the dielectric is hafnium based. Hafnium dioxide has been the leading candidate to replace silicon oxide inside academia for years. A different material is used for PMOS and NMOS gates.
Intel's lithography roadmap no longer ends at P1268, the 32nm node. Earlier today Intel revealed its 22nm node, dubbed 1270, slated for first production in 2011.
Smith closed our conversation with "In 2008, we'll have Nehalem." |
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发表于 2007-1-27 15:45
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