INQ: Nehalem to use either integrated or external memory controller

Prescott

B) 同我N年前的预测完全一致 :p
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Nehalem to use either integrated or external memory controller

Available 65nm capacity eats back

By Theo Valich: Wednesday 15 August 2007, 08:01
AFTER OUR CHARLIE Charlie explained Nehalem codenames and details about Nehalem's IMC technology(Integrated Memory Controller) some time ago, things went into silent mode - for a while.

In this article, we'll disclose Intel's strategy with Nehalem. And so far, it looks like fireworks ahead.

Like the Penryn generation of products, split into the world of desktop, notebook and server segments, Nehalem is divided into the Bloomfield, Gilo, Gainestown+Becktown codenames.

As soon as 45 nanometre processors ramp up with Penryn and its riders Wolfdale, Yorkfield/Penryn, Wolfdale-DP, and Harpertown start arriving onto the market in volume, there is going to be excess capacity in Intel's own 65nanometre fabs.

The north bridge strategy will stay active in CSI era as well. Chipzilla will not take AMD's route and simplify chipsets to a point where "chipset" is actually a single chip, but will keep current two chip configuration.

Due to the excess capacity in the 65 nanometre space, Intel will switch chipset production to 65nm and Northbridge/Southbridge concept will stay in force during 2008, especially on the mobile and on desktop side. North bridge chips will sport the CSI interconnect, GPU (if the part is bears IGP) and a DDR3 memory controller.

On the server side, Intel has no choice but to attack AMD on all fronts, from microarchitecture to the current performance-gutter, the legacy dinosaur named GTL+ or 64-bit FSB. Nehalem comes with CSI: Satan Clara (Common System Interface), but it will be connected to 65nm north bridges that will spot additional memory controller. It is quite obvious that FB-DIMM controller will be removed/disabled for the desktop and notebook part, and chipset will be the one that will provide DDR-2/DDR-3 support. This also applies to servers with registered ECC DDR2 memory.

Integrated memory controller will also be a key part of XE (Extreme) line of products, separating Extreme processors from regular ones - this will be accented with successor of Skulltrail "platform" (dual-socket LGA775 system, second generation V8 that will appear this fall with 45nm Yorkfield-XE processors), also known as the "4-series" chipsets. This will finally mean that Extreme series of processors will start to justify the difference in price between regular desktop components and these premium parts, which are currently clocked as much as 3x more expensive than "regular" desktop part – with the only difference being 333 or 667 MHz difference in clock. This was the case with Intel Core 2 Quad Q6600 (2.40 GHz) and Core 2 Extreme QX6800 (2.93 GHz), or duel of last summer - plain-vanilla E6700 (2.66 GHz) was just marginally slower than X6800 (2.93 GHz).

The current Intel strategy also calls for reducing the number of pins on the processor socket, so pay attention to correlations between Nehalem processors and upcoming Socket H (LGA, 715 golden dots on the backside of the processor).

All in all, Intel is showing manufacturing and marchitectural flexibility bar none, and if CSI really kills the bottleneck that GTL+ has become, the Nehalem marchitecture will take x86 performance to new heights. And DDR3 will finally start to make the difference.

_MyST_Spring

hmm, 这下XE和普通版的差距更大了。

shike_cuke

e文比较差，还得慢慢消化.............

itany

On the server side, Intel has no choice but to attack AMD on all fronts, from microarchitecture to the current performance-gutter, the legacy dinosaur named GTL+ or 64-bit FSB. Nehalem comes with CSI: Satan Clara (Common System Interface), but it will be connected to 65nm north bridges that will spot additional memory controller. It is quite obvious that FB-DIMM controller will be removed/disabled for the desktop and notebook part, and chipset will be the one that will provide DDR-2/DDR-3 support. This also applies to servers with registered ECC DDR2 memory

也就是说，在服务器方面，不仅是CPU会集成MC，北桥也会集成？
这样会不会每个插座搭配一个北桥，使得内存通道加倍？
既然使用了IMC，会不会放弃FB－DIMM？
现在的FB-DIMM不仅增加了延迟，而且增加了耗电量。既然在新平台上内存通道数量上去了，带宽已经不是问题了，那么按说就应该抛弃FB-DIMM，实现更小的延迟，并且更省电啊

Integrated memory controller will also be a key part of XE (Extreme) line of products, separating Extreme processors from regular ones - this will be accented with successor of Skulltrail "platform" (dual-socket LGA775 system, second generation V8 that will appear this fall with 45nm Yorkfield-XE processors), also known as the "4-series" chipsets. This will finally mean that Extreme series of processors will start to justify the difference in price between regular desktop components and these premium parts, which are currently clocked as much as 3x more expensive than "regular" desktop part – with the only difference being 333 or 667 MHz difference in clock. This was the case with Intel Core 2 Quad Q6600 (2.40 GHz) and Core 2 Extreme QX6800 (2.93 GHz), or duel of last summer - plain-vanilla E6700 (2.66 GHz) was just marginally slower than X6800 (2.93 GHz).

下一代V8是双775？不是771？
这太有才了

我个人认为，不在桌面上IMC一方面是考虑DDR2和DDR3两者的兼容问题，另一方面，也是更主要的，是想保住自家芯片组的地位。因为现在Intel在芯片组上边最大的优势就是内存控制器，其它的和NV相比，在SLI上边不说，组个Raid还要专门的R南桥，网络方面的特性也不如NV，如果IMC了，内存上大家都一样了，那么NV有可能就长驱直入了，这个是Intel不愿意看到的……

Prescott

http://www.theinquirer.net/default.aspx?article=38232

The one that is pretty well known about is the IMC for Stoutland, that part defintetly has an IMC. The config there is FB-DIMM 1 or 2 in a 4 + 1 channel setup. This is per CPU mind you, so a 4S Stoutland will have 20 FBD channels.

The volume part, Thurley, will have three DDR3 channels per socket. The memory is currently slated to run at 800/1066/1333, so bandwidth will not be a problem there.

itany

原帖由 ConroeXE 于 2007-8-17 10:59 发表
带内存控制器的四核Nehalem才715个针脚么？和amd搞到1207个那么夸张区别在哪里？:unsure:

715的不带内存控制器，通过CSI访问北桥的MC
即使是这样，CSI也比FSB好多了

itany

原帖由 Prescott 于 2007-8-16 14:28 发表
http://www.theinquirer.net/default.aspx?article=38232

http://www.theinquirer.net/images/articles/intelcsi.jpg



http://uk.theinquirer.net/images/articles/thurl.jpg

这个INQ上边的文章怎么给人似是而非的感觉呢
另外，这两个图稍微糙了点 :(

谢谢P大，我再仔细看看……

the_god_of_pig

貌似是性能过剩催生的:wacko:

bessel

你那个不叫预测，叫做剧透。
明明是有内部消息的人，还好意思说是预测。

你说的关于amd的才算是预测。

原帖由 Prescott

于 2007-8-16 03:44 发表
B) 同我N年前的预测完全一致 :p
==========================================================================
Nehalem to use either integrated or external memory controller

Available 65nm capaci ...

Prescott

原帖由 bessel 于 2007-8-17 18:04 发表
你那个不叫预测，叫做剧透。
明明是有内部消息的人，还好意思说是预测。

你说的关于amd的才算是预测。

我预测桌面不会有IMC的时候，起码是两年多前了吧，那个时候连Conroe都没有，鬼知道Nehalem什么样。

而且我早就预测过K10同频不如Conroe，自从这张图出现，这一点就已经没有悬念，除非有什么没有说出来的。

bessel

继续剧透一点Nehalem或者tukwilla吧，呵呵。

原帖由 Prescott 于 2007-8-17 18:33 发表

我预测桌面不会有IMC的时候，起码是两年多前了吧，那个时候连Conroe都没有，鬼知道Nehalem什么样。

而且我早就预测过K10同频不如Conroe，自从这张图出现，这一点就已经没有悬念，除非有什么没有说出来的。 ...

the_god_of_pig

原帖由 bessel 于 2007-8-17 21:24 发表
继续剧透一点Nehalem或者tukwilla吧，呵呵。

是啊是啊，多少满足一下我们愚弱民众的好奇心嘛:loveliness:

[ 本帖最后由 the_god_of_pig 于 2007-8-17 21:44 编辑 ]

itany

赞成，传说中的Tukwilla全新设计，最好有小道消息阿

itany

原帖由 potomac 于 2007-8-17 22:55 发表
未来能产生戏剧性性能提升的也就两个，其一是intel要搞的GPU的X86扩展。其二是堆叠DRAM。

偶要求不高，不要集成什么内存控制器，只要intel在北桥内堆叠个1G的高速DRAM就够啦。:p

CPU里边堆叠2GB，北桥堆叠2GB，GPU堆叠2GB，貌似3*第二可就保不住了