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单精度 1TFLOPS 出头...似乎也都不怎么样,因为是超频的。
http://www.hpcwire.com/home/spec ... -Life-70347992.html
Apparently though, Intel thinks they can do an end-around the PCI bus and have the CPU and Larrabee talk directly through a "shared virtual memory" to allow for seamless data sharing.
There's no evidence that Intel has built such a system, but Rattner did apparently have a Larrabee chip on hand to put it through its paces. Running SGEMM, a general matrix multiply subroutine in the Basic Linear Algebra Subprograms (BLAS) library, Larrabee delivered about 800 gigaflops, and just over 1 teraflop when they overclocked it. Keep in mind though, SGEMM is the single precession floating point version of the general matrix multiplication routine. A more modest 8 gigaflops was delivered by Larrabee on a couple of sparse matrix codes (QCD and FEM_CANT). |
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