英特尔 Larrabee 体系架构讨论主题

Edison

在调度上，Larrabee 采用的是基于软件的方式：

http://news.cnet.com/8301-13924_3-10005391-64.html

Software-based scheduling: Larrabee features task scheduling which is performed entirely with software, rather than in fixed function logic. Therefore rendering pipelines and other complex software systems can adjust their resource scheduling based each workload's unique computing demand.

the_god_of_pig

http://we.pcinlife.com/thread-979052-1-2.html

唉，俺中午就贴了一下，可惜都在打嘴炮没人理，呵呵{biggrin:]

At 143 mm^2, Intel could fit 10 Larrabee-like cores so let's double that. Now we're at 286mm^2 (still smaller than GT200 and about the size of AMD's RV770) and 20-cores. Double that once more and we've got 40-cores and have a 572mm^2 die, virtually the same size as NVIDIA's GT200 but on a 65nm process.
The move to 45nm could scale as well as 50%, but chances are we'll see something closer to 60 - 70% of the die size simply by moving to 45nm (which is the node that Larrabee will be built on). Our 40-core Larrabee is now at ~370mm^2 on 45nm. If Intel wanted to push for a NVIDIA-like die size we could easily see a 64-core Larrabee at launch for the high end, with 24 or 32-core versions aiming at the mainstream

这段看着YY度很高啊{lol:]

Edison

我觉得core偏弱的情况下，Larrabee如果想成为主处理器，应该是走Same ISA Heterogeneous，问题是带宽比较难解决。

Edison

Larrabee 的驱动团队不是 GMA 那班家伙，而是 自己专配的软件工程师 + 3DLabs 的大型团队，这次Intel下血本了。

http://anandtech.com/cpuchipsets ... spx?i=3367&p=15

I asked Intel who was working on the Larrabee drivers, thankfully the current driver team is hard at work on the current IGP platforms and not on Larrabee. Intel has a number of its own software engineers working on Larrabee's drivers, as well as a large team that came over from 3DLabs. It's too early to say whether or not this is a good thing, nor do we have any idea of what Intel's capabilities are from a regression testing standpoint, but architecture or not, drivers can easily decide the winner in the GPU race.

只为你存在

看来nvidia和amd的生意要越来越不好做了。

Eji

原帖由 RacingPHT 于 2008-8-4 19:58 发表
我觉得一个console只需要一块larrabee+内存就足够了。不过一个larrabee线程的性能似乎应该不会达到同频Atom/PPU的一半？
很难想象一个东西能以这种方式混合了怀旧与新奇的情绪。。

現在看起來Larabee core和Atom core落差還真的很大....
single thread可能不要對比會比較好，應該還是要放個普通的core。

就像CELL的PPE也是不太夠用啦....

itany

原帖由 RacingPHT 于 2008-8-4 19:58 发表
我觉得一个console只需要一块larrabee+内存就足够了。不过一个larrabee线程的性能似乎应该不会达到同频Atom/PPU的一半？
很难想象一个东西能以这种方式混合了怀旧与新奇的情绪。。

要搞Console应该要异构吧，半个Larrabee半个Lynnfield

zifzhu

圣人不死，大盗不止。

我深切的盼望Intel和MS可以早点玩完。Intel的x86和MS的windows都是老掉牙的结构了。但都仗着自身无比强大的财力在硬撑。只有他们玩完了我们才能够见到革命性的新CPU和OS。

Prescott

都是我曾经暗示过的东西。
我早说Larrabee和GMA没什么关系，暗示过线程管理是软件（现在我还可以明确一点说Larrabee上会跑一个FreeBSD）等等等等

可惜没人信啊。哈哈

我今天又在这里纠正一下各位，不要觉得Larrabee的核心性能比Atom差很多

Come on, how hard could it be?

[ 本帖最后由 Prescott 于 2008-8-4 22:25 编辑 ]

elisha

原帖由 Prescott 于 2008-8-4 22:23 发表
都是我曾经暗示过的东西。
我早说Larrabee和GMA没什么关系，暗示过线程管理是软件（现在我还可以明确一点说Larrabee上会跑一个FreeBSD）等等等等

可惜没人信啊。哈哈

我今天又在这里纠正一下各位，不要觉得La ...

那是，atom本身就很弱，LRB能差到哪去啊

gz_easy

Larrabee = software rendering + customized x86 instruction sets + process advantage...

eDRAM

这东西应该强过GTX280吧？:thumbsup:

Prescott

原帖由 eDRAM 于 2008-8-4 23:02 发表
这东西应该强过GTX280吧？:thumbsup:

Edison老大的某位朋友4个月前就测试过Larrabee了，结果你问他就好了 :D
http://we.pcinlife.com/viewthread.php?tid=828668&page=2&fromuid=11807#pid16893967

eDRAM

原帖由 Prescott 于 2008-8-4 23:28 发表

Edison老大的某位朋友4个月前就测试过Larrabee了，结果你问他就好了 :D
http://we.pcinlife.com/viewthread.php?tid=828668&page=2&fromuid=11807#pid16893967

不必问他了，你知道告诉我就行了

Eji

原帖由 RacingPHT 于 2008-8-4 21:20 发表
只是觉得那个结构真是很简练啊，我个人比较喜欢简洁的东西。

说来这次Intel在图形界挖过来的人都是在community中相当有名气的, 绝对不是当年GMA的货色了。
Michael Abrash,Matt Pharr,TomForsyth, 还有Daniel Pohl, Andrew Lauritzen..
我觉得可以说图形学的人力投入, N/A怕是都比不上。

所以"That's so hard"。:)
他們是很認真的。

eDRAM

原帖由 Prescott 于 2008-8-4 23:28 发表

Edison老大的某位朋友4个月前就测试过Larrabee了，结果你问他就好了 :D
http://we.pcinlife.com/viewthread.php?tid=828668&page=2&fromuid=11807#pid16893967

说一下啊~ 拉BB强过GTX280么？

Edison

新闻稿出来了:)

http://www.intel.com/pressroom/archive/releases/20080804fact.htm?cid=rss-90004-c1-210459

The Larrabee architecture uses a 1024 bits-wide, bi-directional ringnetwork (i.e., 512 bits in each direction) to allow agents tocommunicate with each other in low latency manner resulting in superfast communication between cores.